Telugu Engineering
Telugu Engineering
  • Видео 511
  • Просмотров 4 348 446
Parallel Block Statements - Example with Fork-Join || Verilog lectures in Telugu - 34
Parallel Blocks in Verilog.
Просмотров: 509

Видео

Initial Block Example || Verilog lectures in Telugu - 333:28Initial Block Example || Verilog lectures in Telugu - 33
Initial Block Example || Verilog lectures in Telugu - 33
Просмотров 1515 месяцев назад
Example of Initial Block.
Initial Block || Verilog lectures in Telugu - 323:40Initial Block || Verilog lectures in Telugu - 32
Initial Block || Verilog lectures in Telugu - 32
Просмотров 1545 месяцев назад
Initial is one of the procedural block in verilog.
4-bit Left Shift Register - sequential design || Verilog lectures in Telugu - 313:374-bit Left Shift Register - sequential design || Verilog lectures in Telugu - 31
4-bit Left Shift Register - sequential design || Verilog lectures in Telugu - 31
Просмотров 1435 месяцев назад
Sequential Design Models
4:16 Decoder - sequential design || Verilog lectures in Telugu - 302:554:16 Decoder - sequential design || Verilog lectures in Telugu - 30
4:16 Decoder - sequential design || Verilog lectures in Telugu - 30
Просмотров 1425 месяцев назад
Sequential Design models.
4:16 Decoder - combinational design || Verilog lectures in Telugu - 293:044:16 Decoder - combinational design || Verilog lectures in Telugu - 29
4:16 Decoder - combinational design || Verilog lectures in Telugu - 29
Просмотров 1355 месяцев назад
4:16 Decoder
1:4 Demultiplexer - combinational design || Verilog lectures in Telugu - 273:041:4 Demultiplexer - combinational design || Verilog lectures in Telugu - 27
1:4 Demultiplexer - combinational design || Verilog lectures in Telugu - 27
Просмотров 1225 месяцев назад
1:4 Demutliplexer
Combinational Design - Full Adder || Verilog lectures in Telugu - 274:04Combinational Design - Full Adder || Verilog lectures in Telugu - 27
Combinational Design - Full Adder || Verilog lectures in Telugu - 27
Просмотров 1095 месяцев назад
2:1 MUX is a Combinational design. This video explains about it's design in verilog.
Combinational Design - Full Adder || Verilog lectures in Telugu - 254:36Combinational Design - Full Adder || Verilog lectures in Telugu - 25
Combinational Design - Full Adder || Verilog lectures in Telugu - 25
Просмотров 1085 месяцев назад
Full Adder Design in Verilog.
Combinational Design - Half Adder || Verilog lectures in Telugu - 254:53Combinational Design - Half Adder || Verilog lectures in Telugu - 25
Combinational Design - Half Adder || Verilog lectures in Telugu - 25
Просмотров 1625 месяцев назад
Example of Combinational Design using always block.
Always Block || Verilog lectures in Telugu - 233:13Always Block || Verilog lectures in Telugu - 23
Always Block || Verilog lectures in Telugu - 23
Просмотров 1865 месяцев назад
Know more about verilog always block.
Designing combinational & Sequential design using always block ||4:04Designing combinational & Sequential design using always block ||
Designing combinational & Sequential design using always block ||
Просмотров 1245 месяцев назад
Combinational & Sequential designs using always block with examples.
Concatenation & Replication Operators ||Verilog lectures in Telugu - 223:13Concatenation & Replication Operators ||Verilog lectures in Telugu - 22
Concatenation & Replication Operators ||Verilog lectures in Telugu - 22
Просмотров 1605 месяцев назад
Learn about Concatenation & Replication Operators in this video.
Operators || Verilog lectures in Telugu - 219:33Operators || Verilog lectures in Telugu - 21
Operators || Verilog lectures in Telugu - 21
Просмотров 1865 месяцев назад
Different operators in Verilog.
Assign statements || Verilog lectures in Telugu - 203:13Assign statements || Verilog lectures in Telugu - 20
Assign statements || Verilog lectures in Telugu - 20
Просмотров 1875 месяцев назад
Assign statements || Verilog lectures in Telugu - 20
Module Instantiation - Methods || Verilog lectures in Telugu - 193:58Module Instantiation - Methods || Verilog lectures in Telugu - 19
Module Instantiation - Methods || Verilog lectures in Telugu - 19
Просмотров 2075 месяцев назад
Module Instantiation - Methods || Verilog lectures in Telugu - 19
Ports & It's types || Verilog lectures in Telugu - 183:58Ports & It's types || Verilog lectures in Telugu - 18
Ports & It's types || Verilog lectures in Telugu - 18
Просмотров 1405 месяцев назад
Ports & It's types || Verilog lectures in Telugu - 18
Module & It's purpose || Verilog lectures in Telugu - 179:15Module & It's purpose || Verilog lectures in Telugu - 17
Module & It's purpose || Verilog lectures in Telugu - 17
Просмотров 2105 месяцев назад
Module & It's purpose || Verilog lectures in Telugu - 17
Memories in Verilog || Verilog lectures in Telugu - 163:58Memories in Verilog || Verilog lectures in Telugu - 16
Memories in Verilog || Verilog lectures in Telugu - 16
Просмотров 1295 месяцев назад
Memories in Verilog || Verilog lectures in Telugu - 16
Arrays & Array assignment || Verilog lectures in Telugu - 154:56Arrays & Array assignment || Verilog lectures in Telugu - 15
Arrays & Array assignment || Verilog lectures in Telugu - 15
Просмотров 1615 месяцев назад
Arrays & Array assignment || Verilog lectures in Telugu - 15
Bit-Select & Part-Select | Verilog lectures in Telugu - 144:56Bit-Select & Part-Select | Verilog lectures in Telugu - 14
Bit-Select & Part-Select | Verilog lectures in Telugu - 14
Просмотров 1525 месяцев назад
Bit-Select & Part-Select | Verilog lectures in Telugu - 14
Scalar & Vector | Verilog lectures in Telugu - 134:56Scalar & Vector | Verilog lectures in Telugu - 13
Scalar & Vector | Verilog lectures in Telugu - 13
Просмотров 2175 месяцев назад
Scalar & Vector | Verilog lectures in Telugu - 13
Examples for Data-Types || Verilog lectures in Telugu - 125:10Examples for Data-Types || Verilog lectures in Telugu - 12
Examples for Data-Types || Verilog lectures in Telugu - 12
Просмотров 1865 месяцев назад
Examples for Data-Types || Verilog lectures in Telugu - 12
Integer, real, time, real time|| Verilog lectures in Telugu - 115:10Integer, real, time, real time|| Verilog lectures in Telugu - 11
Integer, real, time, real time|| Verilog lectures in Telugu - 11
Просмотров 2115 месяцев назад
Integer, real, time, real time|| Verilog lectures in Telugu - 11
Identifiers & Keywords || Verilog lectures in Telugu - 75:10Identifiers & Keywords || Verilog lectures in Telugu - 7
Identifiers & Keywords || Verilog lectures in Telugu - 7
Просмотров 2975 месяцев назад
Identifiers & Keywords || Verilog lectures in Telugu - 7
Wire | Datatypes || Verilog lectures in Telugu - 96:18Wire | Datatypes || Verilog lectures in Telugu - 9
Wire | Datatypes || Verilog lectures in Telugu - 9
Просмотров 2075 месяцев назад
Wire | Datatypes || Verilog lectures in Telugu - 9
Nets | Datatypes || Verilog lectures in Telugu - 94:22Nets | Datatypes || Verilog lectures in Telugu - 9
Nets | Datatypes || Verilog lectures in Telugu - 9
Просмотров 2195 месяцев назад
Nets | Datatypes || Verilog lectures in Telugu - 9
Content of the variable & It's significance || Verilog lectures in Telugu - 86:02Content of the variable & It's significance || Verilog lectures in Telugu - 8
Content of the variable & It's significance || Verilog lectures in Telugu - 8
Просмотров 2115 месяцев назад
Content of the variable & It's significance || Verilog lectures in Telugu - 8
Operators and Number Format || Verilog lectures in Telugu - 64:52Operators and Number Format || Verilog lectures in Telugu - 6
Operators and Number Format || Verilog lectures in Telugu - 6
Просмотров 3915 месяцев назад
Operators and Number Format || Verilog lectures in Telugu - 6
Comments & White spaces || Verilog lectures in Telugu - 54:52Comments & White spaces || Verilog lectures in Telugu - 5
Comments & White spaces || Verilog lectures in Telugu - 5
Просмотров 4905 месяцев назад
Comments & White spaces || Verilog lectures in Telugu - 5

Комментарии

  • @AKSHITHAPANDILLAPALLI
    @AKSHITHAPANDILLAPALLI День назад

    Hoiii mowaaa 🎉

  • @user-ho5kd7dv4e
    @user-ho5kd7dv4e 3 дня назад

    Mam if sum is equal to 9 if carry generated then we have to add 6 in that case or not

  • @Leo_naidu
    @Leo_naidu 3 дня назад

    Very clear

  • @Manjusree-kj8vq
    @Manjusree-kj8vq 4 дня назад

    Ma devudu nuvvenayya Ma kosam puttavayya 🔥🔥

  • @TeluguTruckGaming.0412
    @TeluguTruckGaming.0412 5 дней назад

    Bad😂 explanation 😂😂😂

  • @user-yp5oo8ey8e
    @user-yp5oo8ey8e 5 дней назад

    P channel e mosfet same vuntadaaa n channel ki

  • @ravulapalli7294
    @ravulapalli7294 7 дней назад

    Super sir

  • @TejaswiniGajulapalli
    @TejaswiniGajulapalli 8 дней назад

    I’ve been watching all your videos on verilog, I’m excited to ask you about system verilog lectures , how can I contact you??

  • @TejaswiniGajulapalli
    @TejaswiniGajulapalli 8 дней назад

    How can I contact you ?

  • @TejaswiniGajulapalli
    @TejaswiniGajulapalli 9 дней назад

    bruh!!!!! okasari reply evvara, system verilog telugu lo explain cheyyagalara? elage neat and clean ga

  • @TejaswiniGajulapalli
    @TejaswiniGajulapalli 9 дней назад

    system verilog meedha kuda videos chesthey, students ki use ayithadhi andi

  • @harshireddy8025
    @harshireddy8025 9 дней назад

    Each video will be cut at the end of the part please upload full video

  • @Pavansai-bc5os
    @Pavansai-bc5os 10 дней назад

    Signs use chestu apply cheyyandi madam

  • @sandeepnani2089
    @sandeepnani2089 11 дней назад

    Thankyou mam❤

  • @SathwikReddy-xm2up
    @SathwikReddy-xm2up 12 дней назад

    Jai supplie

  • @padhuuu
    @padhuuu 13 дней назад

    Chala Baga aa chepparu thank you so much 🥰

  • @santhoshdhannana963
    @santhoshdhannana963 13 дней назад

    Memu govt technical prepare avutunnamu maku telugu lo technical channels levu..meru electronics and communication gurunchi chepte ma lanti chala Mandi useful avutundi...kindly request anna

  • @santhoshdhannana963
    @santhoshdhannana963 13 дней назад

    Hi anna

  • @santhububly2215
    @santhububly2215 17 дней назад

    Ur explanation is 👌 sir..ila chepthe electrical subject easy ga anipistundi. Keep going sir.

  • @user-hu3lw7nd2c
    @user-hu3lw7nd2c 18 дней назад

    Wonderful job dear brother.. I was excited seeing this VLSI Telugu channel. Love you, it will be helpful to thousands of students. thank you so much for your initiative.

  • @youaremyinspirationYOUTUBE
    @youaremyinspirationYOUTUBE 18 дней назад

    Thank you so much sir 🙏

  • @shwethap-oc3ni
    @shwethap-oc3ni 19 дней назад

    ❤❤

  • @gidyonumerla-jx8ln
    @gidyonumerla-jx8ln 21 день назад

    Anna ee chapter lo formulas and problems medha videos chey anna.baga cheptunaru meeru.

  • @NAIDUSGAMEINGYTFF
    @NAIDUSGAMEINGYTFF 21 день назад

    4

  • @Raina__Roy____143
    @Raina__Roy____143 22 дня назад

    Very well explained 👍

  • @user-mh7bz5th8j
    @user-mh7bz5th8j 23 дня назад

    Telugu lo cheppandi please asalake ee subject ardham kadhu malli English enti

  • @user-kt7od3rq3v
    @user-kt7od3rq3v 23 дня назад

    bro miru super Mah faculty cheppedi m ardam avaledu maku Mih videos dwara understand well bro Tq...

  • @RajKumar-kf5dn
    @RajKumar-kf5dn 24 дня назад

    As means arsenic

  • @naveennatural7464
    @naveennatural7464 25 дней назад

    Brother i am a btech student from ECE I saw your video that you posted the roadmap of VLSI and i motivated that to become an RTL design engineer....thanks for that and i want some information how get a job and in vlsi field and what languages i need to learn HDL or VHDL

  • @Tanuja.Vajja654
    @Tanuja.Vajja654 Месяц назад

    TQ bro 🫡🫡

  • @SannidhiPiranaki3377
    @SannidhiPiranaki3377 Месяц назад

    Super❤

  • @abhaypratapsingh7476
    @abhaypratapsingh7476 Месяц назад

    Jb sab bolna hi tha to audio daal deti vedio kyu bnaii

  • @Mounika-wb1st
    @Mounika-wb1st Месяц назад

    Good

  • @saikiranbellamkonda161
    @saikiranbellamkonda161 Месяц назад

    Thanks bro ❤

  • @ashuedits3960
    @ashuedits3960 Месяц назад

    at 16ohm resisters load current is 1.5A

  • @kotaraviteja8351
    @kotaraviteja8351 Месяц назад

    POS explanation video kuda cheyandi sir

  • @VinaySriram-ly4ji
    @VinaySriram-ly4ji Месяц назад

    Allmost mottam English lo ne explain chesthunnaru konchem telugu vadandi

  • @user-pz8hu2rv8m
    @user-pz8hu2rv8m Месяц назад

    mee handwriting chala bagundhi

  • @siddusidharth-jr3ib
    @siddusidharth-jr3ib Месяц назад

    ye video ekada ye topic tharvatha petaloo thelwakapothey videos enduku chesthar ayya

  • @pallamounika7798
    @pallamounika7798 Месяц назад

    What is Use mam Addition of Bcd ?where u can use

  • @pallamounika7798
    @pallamounika7798 Месяц назад

    Bro Binary Numbers ki Mathrame Complement chesthama Mari Decimal ki Andhuke cheyalam

  • @stephen.k6689
    @stephen.k6689 Месяц назад

    The insect is very disturbing🤨 you(while teaching) and me(while watching)😂😁

  • @pylajayanth8694
    @pylajayanth8694 Месяц назад

    Sir VBe applied at bjt it follows the base current why we are called bjt as current controlled device not voltage controlled

  • @shivashankaramalakanti2884
    @shivashankaramalakanti2884 Месяц назад

    this is the video i want😍

  • @user-tr9ij4nk7e
    @user-tr9ij4nk7e Месяц назад

    0.625 ??

  • @kudipudipraneeth8237
    @kudipudipraneeth8237 Месяц назад

    Madam, videos cheysetapudu.... surrounding noisy ga lekunda chusukondi

  • @kudipudipraneeth8237
    @kudipudipraneeth8237 Месяц назад

    Madam, computer networks playlist create cheyandi pls Exams dhagaraki vasthunay....

  • @jyothidharapureddy
    @jyothidharapureddy Месяц назад

    thanks bro

  • @knaveen3850
    @knaveen3850 Месяц назад

    This is wrong p type is holes negative cherga (cariets)&n type electrons positive charge (cariets)

  • @kudipudipraneeth8237
    @kudipudipraneeth8237 Месяц назад

    Anna, microprocessor and microcontrollers meda enka.... videos cheyandi Anna.. And playlist create cheyandi pls Exam time videos vethakadam Kastam avuthundi..